the instructions are in the attached file.please do everything (simulation and report) and ignore ONLY part 6.

ENEE 3517 – Lab 6 – Spring 2017 CMOS Logic Circuits Note: THIS IS NOT A GROUP REPORT – Each student needs to work on the assignment and submit their own report. Simulation : 1. Build the circuit shown in Figure 1 using MOSFETs . U se “real” MOSFETs and not the generic ones (e.g., 2N7000 for NMOS and 3LP01C -TB -E for PMO S). If not already connected , make sure that the body is connected to the source. This is a NAND gate: Figure 1: First C ircuit 2. Verify its operation by using appropriate input voltages for A and B. The output is measured at C. High is 5V, and low is 0V. 3. Connect A to 5V, and start increasing A from 0 to 5V. Observe the output voltage using the voltmeter. Create a graph which shows the output voltage vs the input voltage. 4. Build the NOR gate shown in Figure 2 , and repeat step 2. 5. For the NOR gate, connect input B to 5V , and input A to a 0 -5V, 100kHz, square wave. Display both input and output at the oscilloscope, and observe the difference between input and output, and espe cially any delay between the two (both at the rising edge and the falling edge) . Figure 2: Second Circuit Build on your Breadboard : 6. Build , on your breadboard , the circuit of Figure 1, using the actual MC14007UB CMOS chip , and repeat step 2. For the Report: This report is shorter than our regular reports: Y ou need the cover page, a picture of the circuit that you have built on your breadboard , the Mult isim circuits and the simulation results , and a short description /explanation of the simulation results and of the results obtained for the circuit that you have built on your breadboard .