([0 pts) Sketch the hardware needed to have the 8-bit adden'subtractor below output each of the 4 core flags (Carry, Overflow, Sign, Zero) as well...

Please I need help showing how the following question should be answered.

3. ([0 pts) Sketch the hardware needed to have the 8-bit adden'subtractor below output each of the 4 coreflags (Carry, Overflow, Sign, Zero) as well as any other flags needed for all conditional jumps shown inthe list below, such that only one bit needs checking to determine if the branch is taken. You can label the inputs of each of the logic sections so no need to draw lines all over the placeconnecting them. The last carry out is Com. (:INI Sum" C1: Sum,q -A-‘f . A!" Cour L LIL”. '1' En WK { -‘th Sum I ‘ ‘TN Sum; A”: c‘vll'l' "I" C‘Iflf'l' 5m [h “N Sum: CW Sum n A A1“ Clil'llr 1‘7 t:ILII. '1' ”IN HT” Cm- Sum” (ILN Hum. A”: Ch'll'l' Am Cot": fin "mFLAGS:Signed:Jgt (N V)-0&&Z=OJge (N V) - 0J11". (N V) - 1Jle (N V)-1[|z-1Unsigned:Jhi C - 0 85 z = 0J13 c - 1 | [ z = 1J10 (jcs) C - 1Jhs (jcc) C - OJeq (jzs) z - 1Jne (jzc) z - OJmi (jss) S - 1Jp1 (jsc) S = 0va v = 1Jvc v = 0