Waiting for answer This question has not been answered yet. You can hire a professional tutor to get the answer.
QUESTION
im using the cadence virtuoso software to desing layouts for simple inverter and amplifier circuits i always land up with the same two errors stamp
im using the cadence virtuoso software to desing layouts for simple inverter and amplifier circuits i always land up with the same two errors stamp error and n+sd to psub spacing must be less than or equal to 10u wats this how do i debug it???
