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QUESTION

digital system hw

this hw is due in 5 hours, 

In all of the following problems use an appropriately sized K-map to perform the indicated minimization.

1) For each of the following function expressions generate a minimal sum of products expression:

  a) F (x,y,z) = 

   b) F (w,x,y,z) = 

2) For each of the following function expressions generate a minimal product of sums expression:

   a) F (x,y,z) = 

   b) F (w,x,y,z) = 

3) Design a circuit that performs modulo 4 multiplication. The circuit has two 2-bit numbers (A1A0 and B1B0) as the inputs. It produces a 2-bit number (C1C0) as the result. The output value is produced by multiplying the values of the two inputs and then computing the modulo 4 remainder. So if A was 2 and B was 3, their product is 6 and the remainder after dividing by 4 is 2. Develop minimized sum of product expressions for C1 and C0.

4) Design a circuit that performs some shifting and complementing of an input value. Assume there is a 3-bit input (A2A1A0) and there are two control bits (C1C0) that define the operation to perform according to the following: When C1C0 = 00 shift the input bits to the right so they become A0A2A1; When C1C0 = 01 shift the input bits to the left so they become A1A0A2; When C1C0 = 10 shift the input bits to the right and complement them so they become A0'A2'A1'; When C1C0 = 11 shift the input bits to the left and complement them so they become A1'A0'A2'. Develop minimized sum of product expressions for the three output bits that result from shifting and complementing the input bits according to the control values.

5) Design a circuit that compares two 3-bit numbers ( A2A1A0 and B2B1B0 ) and produces a 2-bit result (C1C0) indicating the relative magnitudes of the two values. If the value of A is the same as the value of B, the output should be 11. If the value of A is greater than the value of B, the output should be 10. If the value of A is less than the value of B, the output should be 01. The output combination of 00 will never occur. Develop minimized sum of product expressions for the two output bits that result from performing the magnitude comparison.

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